Within the framework of this thesis, the influence of non equilibrium post growth thermal treatments of ion implanted and epitaxially grown Ge1-xSnx and Si1-x-yGeySnx layers for nano and optoelectronic devices has been investigated. The main focus has been placed on the study and development of thermal treatment conditions to improve the as grown layer quality and the fabrication of Ge1-xSnx and Si1-x-yGeySnx on SOI JNTs. In addition, through layer characterization, exhaustive analysis has provided deep insight into key material properties and the alloy´s response to the thermal treatment. For instance, (i) the conversion of as grown in plane compressive strained Ge1-xSnx into in-plane tensile strained Ge1-xSnx after PLA that is required for high mobility n-type transistors and (ii) the evolution of monovacancies to larger vacancy clusters due to post growth thermal treatments. Moreover, the adaption of CMOS compatible fabrication approaches to the novel Ge1-xSnx and Si1-x-yGeySnx alloys allowed the successful fabrication of first lateral n-type JNTs on SOI with remarkable Ion/Ioff ratios of up to 10^8 to benchmark the alloy performance.